Embodiments of the present disclosure provide a method for forming a memory, including: forming a memory core using a plurality of cells from a library of cells, wherein each cell in the library of cells follows standard cell row placement constraints and includes a static timing model, and wherein the plurality of cells includes a dynamic bitcell; wherein forming the memory core further includes connecting a plurality of the bitcells via abutment to form a rectangular array of bitcells such that bitlines of the bitcells and wordlines of the bitcells connect by abutment and are shared between adjacent bitcells in the array of bitcells.