Invention Publication
- Patent Title: CRYSTALLINE SEMICONDUCTOR LAYER FORMED IN BEOL PROCESSES
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Application No.: US18167776Application Date: 2023-02-10
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Publication No.: US20230197445A1Publication Date: 2023-06-22
- Inventor: Matthias Passlack , Blandine Duriez , Georgios Vellianitis , Gerben Doornbos , Marcus Johannes Henricus Van Dal , Martin Christopher Holland , Mauricio Manfrini
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L29/786 ; H01L29/66

Abstract:
A crystalline channel layer of a semiconductor material is formed in a backend process over a crystalline dielectric seed layer. A crystalline magnesium oxide MgO is formed over an amorphous inter-layer dielectric layer. The crystalline MgO provides physical link to the formation of a crystalline semiconductor layer thereover.
Public/Granted literature
- US12051702B2 Crystalline semiconductor layer formed in BEOL processes Public/Granted day:2024-07-30
Information query
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