- 专利标题: CHIP STATE MONITORING CIRCUIT BASED ON SELF-BALANCING DIFFERENTIAL SIGNAL INTEGRATION AND AMPLIFICATION CIRCUIT
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申请号: US18347660申请日: 2023-07-06
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公开(公告)号: US20230353161A1公开(公告)日: 2023-11-02
- 发明人: Zhengzhou CAO , Feige XIA , Yueer SHAN , Hua YAN
- 申请人: WUXI ESIONTECH CO., LTD.
- 申请人地址: CN Wuxi
- 专利权人: WUXI ESIONTECH CO., LTD.
- 当前专利权人: WUXI ESIONTECH CO., LTD.
- 当前专利权人地址: CN Wuxi
- 优先权: CN 2211180502.8 2022.09.27
- 主分类号: H03M1/00
- IPC分类号: H03M1/00 ; H03M1/12
摘要:
A chip state monitoring circuit based on a self-balancing differential signal integration and amplification circuit is provided. The chip state monitoring circuit is built in a chip, and can sense a state signal of the chip and transmit the state signal to a chip configuration circuit after performing amplification and analog-to-digital conversion, such that the chip configuration circuit can monitor a state and provide a timely feedback or response, thereby improving reliability and a service life of the chip. The chip state monitoring circuit uses a brand new self-balancing differential signal integration and amplification circuit. With a built-in positive coefficient integration network and negative coefficient balancing network, the self-balancing differential signal integration and amplification circuit can perform amplification by required times to enter a self-balancing stable state, thereby achieving fixed-multiple amplification without timed reading. The control method is simple and flexible.
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