公开(公告)号：US20230353161A1

公开(公告)日：2023-11-02

申请号：US18347660

申请日：2023-07-06

申请人： WUXI ESIONTECH CO., LTD.

发明人： Zhengzhou CAO ,  Feige XIA ,  Yueer SHAN ,  Hua YAN

IPC分类号： H03M1/00 ,  H03M1/12

CPC分类号： H03M1/002 ,  H03M1/1255

摘要： A chip state monitoring circuit based on a self-balancing differential signal integration and amplification circuit is provided. The chip state monitoring circuit is built in a chip, and can sense a state signal of the chip and transmit the state signal to a chip configuration circuit after performing amplification and analog-to-digital conversion, such that the chip configuration circuit can monitor a state and provide a timely feedback or response, thereby improving reliability and a service life of the chip. The chip state monitoring circuit uses a brand new self-balancing differential signal integration and amplification circuit. With a built-in positive coefficient integration network and negative coefficient balancing network, the self-balancing differential signal integration and amplification circuit can perform amplification by required times to enter a self-balancing stable state, thereby achieving fixed-multiple amplification without timed reading. The control method is simple and flexible.