A semiconductor device includes active regions including first and second active regions parallel to each other and extending in a first direction, gate structures including first gate structures intersecting the first active region, extending in a second direction, and parallel to each other, and second gate structures intersecting the second active region, and opposite the first gate structures in the second direction, a gate isolation pattern between the first and second gate structures, a source/drain region on at least one side of the gate structures, and a common contact plug electrically connected to the source/drain region, wherein the gate isolation pattern includes a lower region and upper regions extending from the lower region in a third direction and spaced apart from each other in the first direction, wherein the upper regions are between the first and second gate structures.