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公开(公告)号：US11853901B2
公开(公告)日：2023-12-26
申请号：US16938593
申请日：2020-07-24
发明人： Kwangwon Ko , Jongchul Park
摘要： Disclosed are a training method of an artificial intelligence (AI) model configured to provide information identifying a recommendation item and a recommended user, and an electronic apparatus for training an AI model. The training method includes obtaining user data and item data; generating a first semantic vector at a first time interval based on the user data; generating a second semantic vector at the first time interval based on the item data; generating a vector that represents a relevance between the first semantic vector and the second semantic vector at the first time interval; storing data corresponding to the generated vector, the first semantic vector, and the second semantic vector; and obtaining an updated weight for the first AI model by training the first AI model based on the stored data.
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公开(公告)号：US10608173B2
公开(公告)日：2020-03-31
申请号：US16284439
申请日：2019-02-25
发明人： Yil-hyung Lee , Jong-Kyu Kim , Jongchul Park , Sang-Kuk Kim , Jongsoon Park , Hyeji Yoon , Woohyun Lee
摘要： An ion beam apparatus may include a chamber assembly configured to hold a material and direct an ion beam on the material, a detector configured to detect a signal generated from the material based on the ion beam being directed on the material, and a controller configured to control at least one parameter associated with the chamber assembly based on the signal, such that at least one of an ion energy associated with the ion beam, an ion current associated with the ion beam, and an incident angle of the ion beam with respect to a top surface of the material is changed continuously with time.
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公开(公告)号：US10038136B2
公开(公告)日：2018-07-31
申请号：US15350009
申请日：2016-11-11
发明人： Sungyoon Chung , Jinhye Bae , Hyungjoon Kwon , Jongchul Park , Wonjun Lee
摘要： A method of manufacturing a semiconductor device may include forming a material layer on a substrate, performing a selective oxidation process to form a capping oxide layer on a first surface of the material layer, wherein a second surface of the material layer is not oxidized, and etching the material layer through the second surface to form a material pattern. An etch rate of the capping oxide layer is less than an etch rate of the material layer. A semiconductor device may include a lower electrode on a substrate, a data storage part on a top surface of the lower electrode, an upper electrode on the data storage part, and a capping oxide layer arranged on at least a portion of a top surface of the upper electrode. The capping oxide layer may include an oxide formed by oxidation of an upper surface of the upper electrode.
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公开(公告)号：US09978932B2
公开(公告)日：2018-05-22
申请号：US15057101
申请日：2016-02-29
发明人： Hyungjoon Kwon , Sechung Oh , Vladimir Urazaev , Ken Tokashiki , Jongchul Park , Gwang-Hyun Baek , Jaehun Seo , Sangmin Lee
CPC分类号： H01L43/08 , G11C11/161 , H01L27/222 , H01L27/228 , H01L27/2436 , H01L27/2463 , H01L43/02 , H01L43/10 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/148
摘要： Provided are semiconductor devices and methods of fabricating the same. The semiconductor device may include lower wires, upper wires crossing the lower wires, select elements provided at intersections between the lower and upper wires, and memory elements provided between the select elements and the upper wires. Each of the memory elements may include a lower electrode having a top width greater than a bottom width, and a data storage layer including a plurality of magnetic layers stacked on a top surface of the lower electrode and having a rounded edge.
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公开(公告)号：US09698198B2
公开(公告)日：2017-07-04
申请号：US14602490
申请日：2015-01-22
发明人： Young-Seok Choi , Jaehun Seo , Hyun-woo Yang , Jongchul Park
CPC分类号： H01L27/228 , H01L43/08 , H01L43/12
摘要： Provided is a memory device, including a memory element on a substrate; a protection insulating pattern covering a side surface of the memory element and exposing a top surface of the memory element; an upper mold layer on the protection insulating pattern; and a bit line on and connected to the memory element, the bit line extending in a first direction, the protection insulating pattern including a first protection insulating pattern covering a lower side surface of the memory element; and a second protection insulating pattern covering an upper side surface of the memory element and including a different material from the first protection insulating pattern.
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公开(公告)号：US20140124854A1
公开(公告)日：2014-05-08
申请号：US14154740
申请日：2014-01-14
发明人： Heedon Hwang , Ji-Young Min , Jongchul Park , Insang Jeon , Woogwan Shim
CPC分类号： H01L29/7827 , H01L27/10876 , H01L27/228 , H01L27/2436 , H01L29/66666 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/146
摘要： Semiconductor devices and methods of forming the same may be provided. The semiconductor devices may include a trench in a substrate. The semiconductor devices may also include a bulk electrode within opposing sidewalls of the trench. The semiconductor devices may further include a liner electrode between the bulk electrode and the opposing sidewalls of the trench. The liner electrode may include a sidewall portion between a sidewall of the bulk electrode and one of the opposing sidewalls of the trench.
摘要翻译： 可以提供半导体器件及其形成方法。 半导体器件可以在衬底中包括沟槽。 半导体器件还可以包括在沟槽的相对侧壁内的体电极。 半导体器件还可以包括在本体电极和沟槽的相对侧壁之间的衬垫电极。 衬里电极可以包括在本体电极的侧壁和沟槽的相对侧壁中的一个之间的侧壁部分。
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公开(公告)号：US12014904B2
公开(公告)日：2024-06-18
申请号：US17370766
申请日：2021-07-08
发明人： Jongchul Park , Hyonwook Ra
IPC分类号： H01J37/32 , H01L21/3213
CPC分类号： H01J37/32568 , H01J37/32422 , H01J37/32715 , H01J37/32082 , H01J2237/2007 , H01L21/32136
摘要： A wafer processing apparatus is provided. The wafer processing apparatus includes a chamber body defining a plasma region configured that plasma is generated in the plasma region, a wafer support arranged in the chamber body and configured to support a wafer, first and second electrodes arranged between the wafer support and the plasma region and having apertures configured to guide a path of ions of the plasma, a first power source configured to apply, to the first electrode, a voltage that is higher than a voltage applied to the second electrode, and a second power source configured to apply, to the wafer support, a voltage that is higher than the voltage applied to the second electrode.
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公开(公告)号：US11735627B2
公开(公告)日：2023-08-22
申请号：US17324610
申请日：2021-05-19
发明人： Jongsoon Park , Jongchul Park , Bokyoung Lee , Jeongyun Lee , Hyunggoo Lee , Yeondo Jung , Haegeon Jung
IPC分类号： H01L29/06 , H01L27/088 , H01L29/786 , H01L29/423
CPC分类号： H01L29/0657 , H01L27/088 , H01L29/42392 , H01L29/78696
摘要： A semiconductor device includes a device isolation layer on a substrate; pattern groups including fin patterns extending in a first direction; and gate structures extending in a second direction to intersect the fin patterns. A first pattern group, among the pattern groups, may include first fin patterns. At least a portion of the first fin patterns may be arranged with a first pitch in the second direction. The first pattern group may include a first planar portion extending from a first recess portion. A central axis of the first recess portion may be spaced apart from a central axis of one of the first fin patterns by a first distance in the second direction. The first planar portion may have a first width in the second direction and being greater than the first pitch. The first distance may be about 0.8 times to about 1.2 times the first pitch.
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公开(公告)号：US20150301854A1
公开(公告)日：2015-10-22
申请号：US14692354
申请日：2015-04-21
发明人： Jongchul Park , Jinkyu Koo , Sangbok Han , Myungsun Kim
IPC分类号： G06F9/46
CPC分类号： G06F9/4881 , G06F2209/483 , G06F2209/486 , G06F2209/509 , Y02B70/1441 , Y02D10/24
摘要： Provided are a method and apparatus for task scheduling based on hardware. The method for task scheduling in a scheduler accelerator based on hardware includes: managing task related information based on tasks in a system; updating the task related information in response to a request from a CPU; selecting a candidate task to be run next after a currently running task for each CPU on the basis of the updated task related information; and providing the selected candidate task to each CPU. The scheduler accelerator supports the method for task scheduling based on hardware.
摘要翻译： 提供了一种基于硬件的任务调度的方法和装置。 基于硬件的调度加速器中的任务调度方法包括：根据系统任务管理与任务相关的信息; 响应于来自CPU的请求更新任务相关信息; 基于更新的任务相关信息，为每个CPU在当前运行的任务之后选择要运行的候选任务; 并将所选候选任务提供给每个CPU。 调度器加速器支持基于硬件的任务调度方法。
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公开(公告)号：US12068369B2
公开(公告)日：2024-08-20
申请号：US18348904
申请日：2023-07-07
发明人： Jongsoon Park , Jongchul Park , Bokyoung Lee , Jeongyun Lee , Hyunggoo Lee , Yeondo Jung , Haegeon Jung
IPC分类号： H01L29/06 , H01L27/088 , H01L29/423 , H01L29/786
CPC分类号： H01L29/0657 , H01L27/088 , H01L29/42392 , H01L29/78696
摘要： A semiconductor device includes a device isolation layer on a substrate; pattern groups including fin patterns extending in a first direction; and gate structures extending in a second direction to intersect the fin patterns. A first pattern group, among the pattern groups, may include first fin patterns. At least a portion of the first fin patterns may be arranged with a first pitch in the second direction. The first pattern group may include a first planar portion extending from a first recess portion. A central axis of the first recess portion may be spaced apart from a central axis of one of the first fin patterns by a first distance in the second direction. The first planar portion may have a first width in the second direction and being greater than the first pitch. The first distance may be about 0.8 times to about 1.2 times the first pitch.
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