Invention Publication
- Patent Title: VERIFICATION METHOD AND SYSTEM IN ARTIFICIAL NEURAL NETWORK ARRAY
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Application No.: US18080545Application Date: 2022-12-13
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Publication No.: US20240104164A1Publication Date: 2024-03-28
- Inventor: HIEU VAN TRAN , STEPHEN TRINH , STANLEY HONG , THUAN VU , DUC NGUYEN , HIEN HO PHAM
- Applicant: Silicon Storage Technology, Inc.
- Applicant Address: US CA San Jose
- Assignee: Silicon Storage Technology, Inc.
- Current Assignee: Silicon Storage Technology, Inc.
- Current Assignee Address: US CA San Jose
- Main IPC: G06F17/16
- IPC: G06F17/16 ; G06N3/063

Abstract:
Numerous examples are disclosed of verification circuitry and associated methods in an artificial neural network. In one example, a system comprises a vector-by-matrix multiplication array comprising a plurality of non-volatile memory cells arranged in rows and columns, the non-volatile memory cells respectively capable of storing one of N possible levels corresponding to one of N possible currents, and a plurality of output blocks to receive current from respective columns of the vector-by-matrix multiplication array and generate voltages during a verify operation of the vector-by-matrix multiplication and generate digital outputs during a read operation of the vector-by-matrix multiplication.
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