公开(公告)号：US20240104164A1

公开(公告)日：2024-03-28

申请号：US18080545

申请日：2022-12-13

Applicant: Silicon Storage Technology, Inc.

Inventor： HIEU VAN TRAN ,  STEPHEN TRINH ,  STANLEY HONG ,  THUAN VU ,  DUC NGUYEN ,  HIEN HO PHAM

IPC: G06F17/16 ,  G06N3/063

CPC classification number: G06F17/16 ,  G06N3/063

Abstract: Numerous examples are disclosed of verification circuitry and associated methods in an artificial neural network. In one example, a system comprises a vector-by-matrix multiplication array comprising a plurality of non-volatile memory cells arranged in rows and columns, the non-volatile memory cells respectively capable of storing one of N possible levels corresponding to one of N possible currents, and a plurality of output blocks to receive current from respective columns of the vector-by-matrix multiplication array and generate voltages during a verify operation of the vector-by-matrix multiplication and generate digital outputs during a read operation of the vector-by-matrix multiplication.

公开(公告)号：US20240282351A1

公开(公告)日：2024-08-22

申请号：US18195322

申请日：2023-05-09

Applicant: Silicon Storage Technology, Inc.

Inventor： HIEU VAN TRAN ,  HOA VU ,  STEPHEN TRINH ,  STANLEY HONG ,  THUAN VU ,  NGHIA LE ,  DUC NGUYEN ,  HIEN PHAM

IPC: G11C7/16 ,  G11C7/12 ,  G11C7/14

CPC classification number: G11C7/16 ,  G11C7/12 ,  G11C7/14

Abstract: In one example, a system comprises an array of non-volatile memory cells arranged into rows and columns, the array comprising a first bit line coupled to a first column of non-volatile memory cells and a second bit line coupled to a second column of non-volatile memory cells; and an output block coupled to the array, the output block comprising: a current-to-voltage converter to convert a first current on the first bit line into a first voltage and to convert a second current on the second bit line into a second voltage; and an analog-to-digital converter to convert one or more of the first voltage and the second voltage into a set of output bits.