A semiconductor device may include gate electrodes spaced apart from each other in a first direction on a substrate and including pads in a stepped shape, a channel extending through the gate electrodes, a first through via, first and second separation insulating layers, and an insulating pattern. The gate electrodes may include second gate electrodes below a first gate electrode. The first through via may pass through and electrically connect to a first pad of the first gate electrode, pass through the second gate electrodes, and include a connection portion connected to a conductive pillar. The connection portion may contact the first pad. The first separation insulating layer may be on an upper surface of the connection portion. The second separation insulating layer may be on a bottom surface of the connection portion. The insulating pattern may be between the first through via and sidewalls of the second gate electrodes.