Invention Publication
- Patent Title: ALIGNMENT OF MACROS BASED ON ANCHOR LOCATIONS
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Application No.: US18078540Application Date: 2022-12-09
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Publication No.: US20240193341A1Publication Date: 2024-06-13
- Inventor: Veeresh Pratap Singh , Mohit Sharma , Chatla Surya Phanindra , Sandip Maity , Aman Gayasen , Srinivasan Dasasathyan
- Applicant: Xilinx, Inc.
- Applicant Address: US CA San Jose
- Assignee: Xilinx, Inc.
- Current Assignee: Xilinx, Inc.
- Current Assignee Address: US CA San Jose
- Main IPC: G06F30/398
- IPC: G06F30/398 ; G06F30/392 ; G06F30/394

Abstract:
Placement of macros of a circuit design includes mapping the macros to types of sub-circuits of an integrated circuit (IC). The IC includes anchors and instances of each type of the types of sub-circuits. The macros are grouped based on couplings of the macros to the anchors specified in the circuit design. Each group includes one or more macros, and the one or more macros in each group are all coupled to the same set of one or more anchors. A location is selected from alternative locations for each group of macros based on a distance of the location from the same set of anchors. Each location includes one or more instances of one or more types of the types of sub-circuits. The circuit design is placed and routed after selecting the location for each group, and implementation data is generated for making an IC that implements the circuit design.
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