Invention Publication
- Patent Title: SEMICONDUCTOR DEVICE
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Application No.: US18531898Application Date: 2023-12-07
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Publication No.: US20240194786A1Publication Date: 2024-06-13
- Inventor: Dong Suk SHIN , Jung Taek KIM , Hyun-Kwan YU , Seok Hoon KIM , Pan Kwi PARK , Seo Jin JEONG , Nam Kyu CHO
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Suwon-si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si
- Priority: KR 20220171654 2022.12.09
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/08 ; H01L29/423 ; H01L29/66 ; H01L29/786

Abstract:
There is provided a semiconductor device capable of improving performance and reliability of an element. The semiconductor device includes an active pattern extending in a first direction, and a plurality of gate structures spaced apart from each other in the first direction on the active pattern. Each gate structure comprises a gate electrode extending in a second direction and a gate spacer on a sidewall of the gate electrode and a source/drain pattern disposed between adjacent gate structures. The gate structure comprises a semiconductor liner layer and a semiconductor filling layer on the semiconductor liner layer, wherein the semiconductor liner layer and the semiconductor filling layer are formed of silicon-germanium. The semiconductor filling layer comprises an upper portion protruding in a third direction beyond an upper surface of the active pattern. A maximum width of the upper portion of the semiconductor filling layer in the first direction is greater than a width of the semiconductor filling layer in the first direction on the upper surface of the active pattern. The semiconductor liner layer comprises an outer surface in contact with the active pattern and an inner surface facing the semiconductor filling layer. In a plan view, the inner surface of the semiconductor liner layer comprises a concave region.
Information query
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