A semiconductor device includes a substrate comprising a chip region and a scribe lane region including a first key pattern region, a capping insulating layer disposed on the scribe lane region, a barrier metal layer covering the capping insulating layer and an inner wall of a via hole penetrating the capping insulating layer, a substrate layer disposed on the barrier metal layer and filling the via hole, an insulating plate and an upper base layer disposed on the substrate layer, a pattern insulating layer disposed on the capping insulating layer in the first key pattern region, a stacked structure disposed on the upper base layer and the pattern insulating layer, and first pattern structures overlapping the pattern insulating layer in a vertical direction and penetrating the stacked structure and the pattern insulating layer, wherein the pattern insulating layer extends through the barrier metal layer in the first key pattern region.