Some aspects of the present disclosure relate to an apparatus comprising memory circuitry, machine-readable instructions, and processor circuitry to execute the machine-readable instructions to obtain a physical layout of a first processor circuitry comprising a plurality of processor cores and thermal information of the plurality of processor cores and to determine a first processor core of the plurality of processor cores to execute a first work-load based on the physical layout of the first processor circuitry and the thermal information of the plurality of processor cores.