Invention Publication
- Patent Title: PARTIAL BLOCK HANDLING PROTOCOL IN A NON-VOLATILE MEMORY DEVICE
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Application No.: US18670073Application Date: 2024-05-21
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Publication No.: US20240312526A1Publication Date: 2024-09-19
- Inventor: Zhongguang Xu , Tingjun Xie , Murong Lang
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee Address: US ID Boise
- Main IPC: G11C16/10
- IPC: G11C16/10 ; G11C16/08 ; G11C16/26 ; G11C16/32 ; G11C16/34
Abstract:
A processing device in a memory sub-system logically closes a block of a memory device to prevent additional program operations from being performed on the block. The processing device further causes one or more wordlines of the block to be programmed with padding data. The one or more wordlines are adjacent to a last wordline of the block programmed before the block was logically closed. In addition, the processing device causes a remaining set of wordlines of the block to be concurrently programmed to a single program state.
Information query
