Invention Publication
- Patent Title: GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUCT ACCUMULATE INSTRUCTION FOR HYBRID FLOATING POINT FORMAT
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Application No.: US18647549Application Date: 2024-04-26
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Publication No.: US20240362180A1Publication Date: 2024-10-31
- Inventor: Subramaniam Maiyuran , Shubra Marwaha , Ashutosh Garg , Supratim Pal , Jorge Parra , Chandra Gurram , Varghese George , Darin Starkey , Guei-Yuan Lueh
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06F15/78
- IPC: G06F15/78 ; G06F7/544 ; G06F7/575 ; G06F7/58 ; G06F9/30 ; G06F9/38 ; G06F9/50 ; G06F12/02 ; G06F12/06 ; G06F12/0802 ; G06F12/0804 ; G06F12/0811 ; G06F12/0862 ; G06F12/0866 ; G06F12/0871 ; G06F12/0875 ; G06F12/0882 ; G06F12/0888 ; G06F12/0891 ; G06F12/0893 ; G06F12/0895 ; G06F12/0897 ; G06F12/1009 ; G06F12/128 ; G06F15/80 ; G06F17/16 ; G06F17/18 ; G06N3/08 ; G06T1/20 ; G06T1/60 ; G06T15/06 ; H03M7/46

Abstract:
Graphics processors and graphics processing units having dot product accumulate instructions for a hybrid floating point format are disclosed. In one embodiment, a graphics multiprocessor comprises an instruction unit to dispatch instructions and a processing resource coupled to the instruction unit. The processing resource is configured to receive a dot product accumulate instruction from the instruction unit and to process the dot product accumulate instruction using a bfloat16 number (BF16) format.
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