Invention Application
- Patent Title: MULTI-GATE FET WITH SELF-ALIGNED TAPERED ACTIVE REGION EDGE
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Application No.: US18365989Application Date: 2023-08-05
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Publication No.: US20250048695A1Publication Date: 2025-02-06
- Inventor: Reinaldo Vega , Takashi Ando , James P. Mazza , Nicholas Anthony Lanzillo , David Wolpert
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY ARMONK
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY ARMONK
- Main IPC: H01L29/08
- IPC: H01L29/08 ; H01L21/3065 ; H01L29/06 ; H01L29/423 ; H01L29/66 ; H01L29/775

Abstract:
A semiconductor device includes a substrate and a plurality of stacked transistors positioned on the substrate. The transistors include a gate region and a source and drain proximate the gate region. The source and drain includes an overall region and an active region. A thickness of the active region is less than a thickness of the overall region.
Information query
IPC分类: