Invention Application
- Patent Title: INTEGRATED CIRCUIT PACKAGE AND METHOD OF FORMING THEREOF
-
Application No.: US18984028Application Date: 2024-12-17
-
Publication No.: US20250118575A1Publication Date: 2025-04-10
- Inventor: Hsien-Wei Chen , Ming-Fa Chen , Ying-Ju Chen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L25/18
- IPC: H01L25/18 ; H01L21/66 ; H01L23/00 ; H10B80/00

Abstract:
A method of forming an integrated circuit package includes attaching a first die to an interposer. The interposer includes a first die connector and a second die connector on the interposer and a first dielectric layer covering at least one sidewall of the first die connector and at least one sidewall of the second die connector. The first die is coupled to the first die connector and to the first dielectric layer and the second die connector is exposed by the first die. The method further includes recessing the first dielectric layer to expose at least one sidewall of the second die connector and attaching a second die to the interposer, the second die being coupled to the second die connector.
Information query
IPC分类: