发明授权
US4359771A Method and apparatus for testing and verifying the operation of error
control apparatus within a memory
失效
用于测试和验证存储器内的错误控制装置的操作的方法和装置
- 专利标题: Method and apparatus for testing and verifying the operation of error control apparatus within a memory
- 专利标题(中): 用于测试和验证存储器内的错误控制装置的操作的方法和装置
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申请号: US172486申请日: 1980-07-25
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公开(公告)号: US4359771A公开(公告)日: 1982-11-16
- 发明人: Robert B. Johnson , Chester M. Nibby, Jr.
- 申请人: Robert B. Johnson , Chester M. Nibby, Jr.
- 申请人地址: MA Waltham
- 专利权人: Honeywell Information Systems Inc.
- 当前专利权人: Honeywell Information Systems Inc.
- 当前专利权人地址: MA Waltham
- 主分类号: G06F12/16
- IPC分类号: G06F12/16 ; G06F11/10 ; G06F11/22 ; G06F11/267 ; G11C11/406 ; G11C29/00 ; G11C29/42
摘要:
Soft error rewrite control apparatus is included within a memory system for rendering the semiconductor memory modules less susceptible to single bit errors produced by alpha particles and other system disturbances. During a number of successive memory cycles occurring at a predetermined rate, the soft error rewrite control apparatus enables the read out of information stored within each module location, the correction of any single bit errors contained therein and the rewriting of the corrected information back into such location. Diagnostic apparatus is further included which is connected to place the memory system in a state for testing and verifying the operation of the soft error control apparatus. Also, the diagnostic apparatus is connected to condition the soft error control apparatus for operating in a high speed mode enabling the read out correction and rewriting of each location to take place within a minimum amount of time. By monitoring the status of the information being corrected, the diagnostic apparatus is able to signal whether or not the soft error control apparatus is operating properly.
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