发明授权
- 专利标题: DMOS With gate protection diode formed over base region
- 专利标题(中): DMOS在基极区域形成栅极保护二极管
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申请号: US350589申请日: 1982-02-22
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公开(公告)号: US4492974A公开(公告)日: 1985-01-08
- 发明人: Isao Yoshida , Takeaki Okabe , Mineo Katsueda , Minoru Nagata , Toshiaki Masuhara , Kazutoshi Ashikawa , Hideaki Kato , Mitsuo Ito , Shigeo Ohtaka , Osamu Minato , Yoshio Sakai
- 申请人: Isao Yoshida , Takeaki Okabe , Mineo Katsueda , Minoru Nagata , Toshiaki Masuhara , Kazutoshi Ashikawa , Hideaki Kato , Mitsuo Ito , Shigeo Ohtaka , Osamu Minato , Yoshio Sakai
- 申请人地址: JPX Tokyo
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX56-26797 19810227
- 主分类号: H01L27/02
- IPC分类号: H01L27/02 ; H01L27/04 ; H01L27/06 ; H01L29/78 ; H01L29/861 ; H01L29/90 ; H02H3/20
摘要:
A semiconductor integrated circuit device is provided to include a vertical type MOSFET and a gate protection element for the MOSFET. The vertical type MOSFET is made up of a silicon layer of n-type conductivity formed on an n.sup.+ -type silicon substrate, a base region of p-type conductivity formed in the surface of the silicon layer of n-type conductivity, an n.sup.+ -type source region provided in the base region, and a gate electrode formed on a portion of the base region through a gate insulating film. The silicon substrate serves as the drain. The gate protection element is formed of a polycrystalline silicon layer which is provided on the base region through an insulating film and includes at least one pn junction. By virtue of forming the gate protection element over the base region rather than directly over the substrate, a more stable operation is achieved.
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