A ballistic conduction majority carrier type semiconductor device structure can be fabricated with a built-in difference in barrier height between the emitter and collector interfaces by employing surface fermi level pinning in a crystalline structure with three copolanar regions of different semiconductor materials. The center region between the interfaces with the external zones of the structure has a thickness of the order of the mean free path of an electron. The materials of the external regions are such that there is a mismatch between the crystal spacing of the external regions and the central region which causes the fermi level of the material in the central zone to be pinned in the region of the conduction band at the interfaces with the external regions and the material of the external regions is selected so that the surface fermi level is pinned in the forbidden region. A monocrystalline structure having an emitter region of GaAs, a central or base region of InAs or W 100 .ANG. to 500 .ANG. thick, and a collector region of GaInAs provides switching in the range of 10.sup.-12 seconds.