发明授权
- 专利标题: Protection of integrated circuits from electrostatic discharges
- 专利标题(中): 保护集成电路免受静电放电
-
申请号: US113113申请日: 1987-10-27
-
公开(公告)号: US4839768A公开(公告)日: 1989-06-13
- 发明人: Vincenzo Daniele , Mirella Benedetti
- 申请人: Vincenzo Daniele , Mirella Benedetti
- 申请人地址: ITX Catania
- 专利权人: SGS Microelettronica S.p.A.
- 当前专利权人: SGS Microelettronica S.p.A.
- 当前专利权人地址: ITX Catania
- 优先权: ITX83666A/86 19861203
- 主分类号: H05F3/02
- IPC分类号: H05F3/02 ; H01L21/331 ; H01L21/822 ; H01L21/8234 ; H01L27/02 ; H01L27/04 ; H01L27/06 ; H01L27/088 ; H01L29/73 ; H01L29/78
摘要:
The influence of the resistance of the connection between a terminal of voltage limiting diodes against discharges of electrostatic nature which may hit a pad of an integrated circuit and a respective common potential node of the integrated circuit (supply or ground node) is unsuspectably critical. A resistance of just few ohms may depress the maximum tolerable discharge voltage by several thousands volts and the relationship between such two parameters is hyperbolic. Such a critical resistance may advantageously be reduced by utilizing more levels of metallization purposely connected in parallel and/or by "shifting" the protection diodes near the real (and not virtual) common potential node of the circuit or by utilizing "ring" metallizations over different levels for both the common potential nodes of the circuit.
公开/授权文献
- US5444712A Communication mode identification technique 公开/授权日:1995-08-22
信息查询