发明授权
US5250827A Semiconductor integrated circuit having a DRAM cell unit and a
nonvolatile cell unit
失效
具有DRAM单元单元和非易失性单元单元的半导体集成电路
- 专利标题: Semiconductor integrated circuit having a DRAM cell unit and a nonvolatile cell unit
- 专利标题(中): 具有DRAM单元单元和非易失性单元单元的半导体集成电路
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申请号: US717409申请日: 1991-06-18
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公开(公告)号: US5250827A公开(公告)日: 1993-10-05
- 发明人: Naoto Inoue , Motoo Toyama , Hiroshi Takahashi , Masahiko Kinbara
- 申请人: Naoto Inoue , Motoo Toyama , Hiroshi Takahashi , Masahiko Kinbara
- 申请人地址: JPX
- 专利权人: Seiko Instruments Inc.
- 当前专利权人: Seiko Instruments Inc.
- 当前专利权人地址: JPX
- 优先权: JPX2-163673 19900621; JPX2-229480 19900829
- 主分类号: G11C11/22
- IPC分类号: G11C11/22 ; G11C14/00 ; H01L29/68
摘要:
A high density nonvolatilized semiconductor integrated circuit is comprised of a Dynamic RAM (DRAM) cell unit and a nonvolatile cell unit. The DRAM cell unit is comprised of a first transistor having its gate connected to a word line, its source connected to a bit line and its drain connected to a first capacitor. The first capacitor has its other electrode connected to a first line. The nonvolatile RAM cell unit is comprised of a second transistor having its gate connected to a second line, its source connected to the bit line and its drain connected to a second capacitor. The second capacitor has its other electrode connected to a third line. The second capacitor comprises a ferroelectric substance to which a reverse voltage is applied in order to read out its signal, and the first capacitor comprises a paraelectric substance to which such reverse voltage is not applied. The cycle life of the DRAM cell unit is thereby increased. Further, the composition of the integrated circuit having a smaller number of constituent elements allows high-density circuit formation.