发明授权
US5397432A Method for producing semiconductor integrated circuits and apparatus
used in such method
失效
用于制造半导体集成电路的方法和用于这种方法的装置
- 专利标题: Method for producing semiconductor integrated circuits and apparatus used in such method
- 专利标题(中): 用于制造半导体集成电路的方法和用于这种方法的装置
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申请号: US743383申请日: 1991-08-21
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公开(公告)号: US5397432A公开(公告)日: 1995-03-14
- 发明人: Jun-ichi Konno , Keisuke Shinagawa , Toshiyuki Ishida , Takahiro Ito , Tetsuo Kondo , Fukashi Harada , Shuzo Fujimura
- 申请人: Jun-ichi Konno , Keisuke Shinagawa , Toshiyuki Ishida , Takahiro Ito , Tetsuo Kondo , Fukashi Harada , Shuzo Fujimura
- 申请人地址: JPX Kawasaki
- 专利权人: Fujitsu Limited
- 当前专利权人: Fujitsu Limited
- 当前专利权人地址: JPX Kawasaki
- 优先权: JPX2-171791 19900627
- 主分类号: H01L21/00
- IPC分类号: H01L21/00 ; H01L21/02 ; H01L21/311 ; H01L21/3213
摘要:
To prevent after-corrosion of wiring or electrodes formed by patterning films of aluminum or an alloy thereof by reactive ion etching (RIE) using an etchant containing chlorine gas or its gaseous compounds, residual chlorine on the surface of the wiring or electrodes is removed by exposing it to a plasma generated in an atmosphere containing water vapor or to neutral active species extracted from the plasma. This treatment is performed either at the same time or after an ashing operation, an operation for removing a resist mask used in the aforesaid RIE by adding water vapor to an atmosphere containing oxygen. To perform the latter separate treatment, an automatic processing system is disclosed in which an after-treatment apparatus for removing residual chlorine is connected, via a second load lock chamber, to an ashing apparatus connected to a RIE apparatus by a load lock chamber which is capable of making a vacuum.
公开/授权文献
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