发明授权
US5488003A Method of making emitter trench BiCMOS using integrated dual layer
emitter mask
失效
使用集成双层发射器掩模制造发射极沟槽BiCMOS的方法
- 专利标题： Method of making emitter trench BiCMOS using integrated dual layer emitter mask
- 专利标题（中）： 使用集成双层发射器掩模制造发射极沟槽BiCMOS的方法
-
申请号： US40673申请日： 1993-03-31
-
公开(公告)号： US5488003A公开(公告)日： 1996-01-30
- 发明人: Stephen Chambers , Brian J. Brown , Chan-Hong Chern , Robert Chau , Leopoldo D. Yau
- 申请人： Stephen Chambers , Brian J. Brown , Chan-Hong Chern , Robert Chau , Leopoldo D. Yau
- 申请人地址： CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： CA Santa Clara
- 主分类号： H01L21/331
- IPC分类号： H01L21/331 ; H01L21/8249 ; H01L29/08 ; H01L21/265
摘要：
A new method of isolating a polysilicon emitter from the base region of a bipolar transistor, trenching the polysilicon emitter into the semiconductor substrate, and maintaining a consistent base width of a bipolar transistor independent of variations in emitter mask thicknesses is disclosed. The polysilicon emitter isolation provides for better electrical breakdown characteristics between the emitter and the base by protecting the dielectric layer between the polysilicon emitter and base regions from defects and contamination associated with the BiCMOS manufacturing environment. The polysilicon emitter is trenched into the semiconductor substrate in order to reduce transistor operation problems associated with hot electron injection. Consistent base widths improve transistor performance uniformity thereby improving manufacturability and reliability.
公开/授权文献
- US5872278A Preparation of isocyanates having a light color 公开/授权日：1999-02-16
信息查询
IPC分类:
