发明授权
US5561319A Integrated circuit structure including CMOS devices protected by
patterned nitride passivation and method for the fabrication thereof
失效
集成电路结构包括由图案化氮化物钝化保护的CMOS器件及其制造方法
- 专利标题： Integrated circuit structure including CMOS devices protected by patterned nitride passivation and method for the fabrication thereof
- 专利标题（中）： 集成电路结构包括由图案化氮化物钝化保护的CMOS器件及其制造方法
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申请号： US298041申请日： 1994-08-30
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公开(公告)号： US5561319A公开(公告)日： 1996-10-01
- 发明人: Alexander H. Owens , Shahin Toutounchi , Abraham Yee , Michael Lyu
- 申请人： Alexander H. Owens , Shahin Toutounchi , Abraham Yee , Michael Lyu
- 申请人地址： CA Milpitas
- 专利权人： LSI Logic Corporation
- 当前专利权人： LSI Logic Corporation
- 当前专利权人地址： CA Milpitas
- 主分类号： H01L23/31
- IPC分类号： H01L23/31 ; H01L29/06 ; H01L29/40 ; H01L29/34 ; H01L21/265
摘要：
A CMOS integrated circuit structure is disclosed having a patterned nitride passivation layer, wherein the nitride is patterned such that it does not overlie the thin gate oxide portions of one or more of the MOS devices. When protection against the effects of external radiation is desired, the thin gate oxide areas of the PMOS devices are left uncovered by the patterned nitride passivation layer. When protection is desired against the effects of internally generated "hot electrons", the thin gate oxide areas of the NMOS devices are left uncovered by the patterned nitride passivation layer.
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