A phase comparator circuit in which an output synchronized with the input signal may be accurately produced without producing a malfunction even in the absence of the synchronization signal, in which a detection unit 11 detects the phase information of an input signal, an error detection unit 12 detects the phase error with respect to the phase of the input signal, a switch 13 switches between the phase error from the error detecting unit and plural fixed values of the phase error +.DELTA..alpha. and -.DELTA..alpha., a first storage unit 141 stores past m portions of the phase information from the detection unit 11, a second storage unit 143 stores past m portions of the frequency comparison state, a setting unit 142 sets the current frequency comparison state from the phase information from the detection unit 11, the phase information being stored in the second storage unit 141 and the frequency comparison state from the second storage unit 143, and a selecting unit 144 selects the phase error outputted by the switch 13 based upon the current frequency comparison state from the setting unit 142 and the sign of the phase error from the error detection unit 12.