发明授权
US5638596A Method of employing multi-layer tab tape in semiconductor device
assembly by selecting, breaking, downwardly bending and bonding tab
tape trace free ends to a ground or power plane
失效
在半导体器件组件中采用多层贴片带的方法,通过选择,断开,向下弯曲和将片状带无轨迹结合到地面或电源平面
- 专利标题: Method of employing multi-layer tab tape in semiconductor device assembly by selecting, breaking, downwardly bending and bonding tab tape trace free ends to a ground or power plane
- 专利标题(中): 在半导体器件组件中采用多层贴片带的方法,通过选择,断开,向下弯曲和将片状带无轨迹结合到地面或电源平面
-
申请号: US462194申请日: 1995-06-05
-
公开(公告)号: US5638596A公开(公告)日: 1997-06-17
- 发明人: John McCormick
- 申请人: John McCormick
- 申请人地址: CA Milpitas
- 专利权人: LSI Logic Corporation
- 当前专利权人: LSI Logic Corporation
- 当前专利权人地址: CA Milpitas
- 主分类号: G01R1/073
- IPC分类号: G01R1/073 ; H01L21/60 ; H01L21/607 ; H01L23/13 ; H01L23/31 ; H01L23/367 ; H01L23/495 ; H01L23/498 ; H01L23/50 ; H01L23/58 ; H01R43/00 ; H05K3/30
摘要:
One or two, or more, additional conductive layers, separated from one another (if two or more) and separated from a patterned (signal) conductive layer are formed in a flexible substrate, for mounting a semiconductor die in a semiconductor device assembly. These additional layers are used as separate planes for carrying power and/or ground from outside the assembly to the die, on a separate plane from signals entering or exiting the die. Another aspect of the present invention provides a semiconductor device assembly including a first conductive layer with a plurality of traces formed on an insulating layer, a second conductive layer with an inner edge portion exposed within the central opening in the insulating layer, and a leadframe having a number of leads the inner end of one or more of the leads being electrically connected to an outer end of one or more of the traces. Selected traces are cut substantially at an inner peripheral edge of the first insulating layer, bent past the first insulating layer, and bonded to the exposed inner edge portion of the second conductive layer. The insulating layer may also include an outer peripheral opening through which an outer edge portion of the second conductive layer is exposed. The selected traces are cut substantially at the inner edge of the outer peripheral opening in the insulating layer, bent past the insulating layer, and bonded to the outer edge portion of the second conductive layer.
信息查询