摘要:
A vacuum accumulator system includes a booster, a vacuum accumulator disposed in fluid communication with the booster and an engine disposed in fluid communication with the vacuum accumulator.
摘要:
A gift-wrapping envelope including: a face panel; a back panel integrally coupled with the face panel; an expandable side panel coupled to both the face and back panels; an enclosure panel integrally coupled to the face, back, or side panels and releasably couplable to one of the panels to which it is not integrally coupled; a nametag area; and a releasably couplable accessory area. The gift-wrapping envelope may include an audio label. The nametag panel may be erasably writable. The releasably couplable accessory area may include a release liner and/or a no-rip material. The expandable side panel may include accordion-type folds.
摘要:
A ready-to-use lawn colorant and fertilizer composition is provided in a spray bottle. The composition includes a water-based lawn paint, fertilizer with nitrogen, phosphate and potash, and water.
摘要:
One or two, or more, additional conductive layers, separated from one another (if two or more) and separated from a patterned (signal) conductive layer are formed in a flexible substrate, for mounting a semiconductor die in a semiconductor device assembly. These additional layers are used as separate planes for carrying power and/or ground from outside the assembly to the die, on a separate plane from signals entering or exiting the die. TAB processes are disclosed for cutting, bending and bonding inner and outer portions of selected signal layer traces to respective inner and outer edge portions of the additional conductive layer(s), including a two-stage process of (1) first cutting, bending and tacking the selected traces to the additional layer(s), and then (2) repositioning a bonding tool and securely bonding the selected traces to the additional layer(s). A tool (die pedestal) for aiding in the assembly process is also disclosed.
摘要:
One or two, or more, additional conductive layers, separated from one another (if two or more) and separated from a patterned (signal) conductive layer are formed in a flexible substrate, for mounting a semiconductor die in a semiconductor device assembly. These additional layers are used as separate planes for carrying power and/or ground from outside the assembly to the die, on a separate plane from signals entering or exiting the die. TAB processes are disclosed for cutting, bending and bonding inner and outer portions of selected signal layer traces to respective inner and outer edge portions of the additional conductive layer(s), including a two-stage process of (1) first cutting, bending and tacking the selected traces to the additional layer(s), and then (2) repositioning a bonding tool and securely bonding the selected traces to the additional layer(s). A tool (die pedestal) for aiding in the assembly process is also disclosed.
摘要:
One or two, or more, additional conductive layers, separated from one another (if two or more) and separated from a patterned (signal) conductive layer are formed in a flexible substrate, for mounting a semiconductor die in a semiconductor device assembly. These additional layers are used as separate planes for carrying power and/or ground from outside the assembly to the die, on a separate plane from signals entering or exiting the die. Another aspect of the present invention provides a semiconductor device assembly including a first conductive layer with a plurality of traces formed on an insulating layer, a second conductive layer with an inner edge portion exposed within the central opening in the insulating layer, and a leadframe having a number of leads the inner end of one or more of the leads being electrically connected to an outer end of one or more of the traces. Selected traces are cut substantially at an inner peripheral edge of the first insulating layer, bent past the first insulating layer, and bonded to the exposed inner edge portion of the second conductive layer. The insulating layer may also include an outer peripheral opening through which an outer edge portion of the second conductive layer is exposed. The selected traces are cut substantially at the inner edge of the outer peripheral opening in the insulating layer, bent past the insulating layer, and bonded to the outer edge portion of the second conductive layer.
摘要:
Methods and systems for monitoring the integrity of a graphics processing unit (GPU) are provided. The method comprises the steps of determining a known-good result associated with an operation of the GPU, and generating a test image comprising a test subject using the operation of the GPU, such that the test subject is associated with the known-good result. The test image is written to video memory, and the known-good result is written to system memory. Subsequently, the test subject from the test image is transfered from video memory to system memory. The test subject in the system memory is compared with the known-good result in system memory. If the test subject does not match the known-good result, then a conclusion is drawn that the integrity of the GPU has been compromised.
摘要:
In various embodiments, dead space and associated coupling losses are reduced in energy storage and recovery systems employing compressed air via use of a compressed-gas reservoir for maintaining a connector between cylinder assemblies at an intermediate pressure, thereby reducing the volume of dead space in the connector and increasing efficiency of the energy storage and recovery.
摘要:
A dual tip test probe assembly for use in both cantilever and vertical probe applications includes first and second elongated test probes, each having a body portion and a tip portion with a tip configured to make contact with a device under test. An electrically-insulating material is disposed between but not in contact with the body portions of the first and second elongated test probes to electrically isolate the first and second elongated test probes. The first and second elongated test probes are held in alignment with respect to each other so that the tip of the first elongated test probe is adjacent to and not in contact with the tip of the second elongated test probe for making simultaneous contact with the device under test. The dual tip test probe assembly provides a low inductance and a small, stable footprint for testing small and/or non-flat test points.