- 专利标题： Semiconductor memory device having internal address converting function, whose test and layout are conducted easily
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申请号： US756505申请日： 1996-11-26
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公开(公告)号： US5740119A公开(公告)日： 1998-04-14
- 发明人: Mikio Asakura , Hideto Hidaka , Kiyohiro Furutani , Kenichi Yasuda
- 申请人： Mikio Asakura , Hideto Hidaka , Kiyohiro Furutani , Kenichi Yasuda
- 申请人地址： JPX Tokyo
- 专利权人： Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人： Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人地址： JPX Tokyo
- 优先权： JPX7-309311 19951128
- 主分类号： G11C8/12
- IPC分类号： G11C8/12 ; G11C11/401 ; G11C11/406 ; G11C29/00 ; G11C29/14 ; G11C29/28 ; G11C29/56 ; G11C7/00
摘要：
In a semiconductor memory device selectively implementing one of a 4K refresh cycle and a 8K refresh cycle, the positions of externally applied address signal bits are switched internally by address switching circuits such that memory cells at the same positions are selected regardless of whether the 4K refresh cycle or the 8K refresh cycle is specified according to a refresh cycle mode specify signal. As a result, by testing the device in one refresh cycle mode, the device can be checked in both refresh cycle operations, reducing the test time and making the test easier.
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