发明授权
US5978294A Memory cell evaluation semiconductor device, method of fabricating the
same and memory cell evaluation method
失效
存储单元评估半导体器件，其制造方法和存储单元评估方法
- 专利标题： Memory cell evaluation semiconductor device, method of fabricating the same and memory cell evaluation method
- 专利标题（中）： 存储单元评估半导体器件，其制造方法和存储单元评估方法
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申请号： US112506申请日： 1998-07-09
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公开(公告)号： US5978294A公开(公告)日： 1999-11-02
- 发明人: Shuichi Ueno , Tomohiro Yamashita , Hidekazu Oda , Shigeki Komori
- 申请人： Shuichi Ueno , Tomohiro Yamashita , Hidekazu Oda , Shigeki Komori
- 申请人地址： JPX Tokyo
- 专利权人： Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人： Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人地址： JPX Tokyo
- 优先权： JPX10-009591 19980121
- 主分类号： G01R31/28
- IPC分类号： G01R31/28 ; G11C7/14 ; G11C11/401 ; G11C11/406 ; G11C29/12 ; G11C29/24 ; H01L21/66 ; H01L21/8242 ; H01L27/108 ; G11C7/02 ; G11C11/24
摘要：
A dummy cell part includes a capacitor having a first end which is connected to one of a plurality of pads and a P-N junction element having a first end which is connected to one of the plurality of pads and a second end which is connected to one of the plurality of pads . A sense part is connected to a second end of the capacitor , for sensing a potential on the second end of the capacitor and outputting the result of sensing to one of the plurality of pads . Thus, a memory cell evaluation semiconductor device which can evaluate a single memory cell, a method of fabricating the same and a memory cell evaluation method are obtained.
公开/授权文献
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