A modular integrated circuit tester includes a set of tester modules for carrying out a sequence of tests on an integrated circuit device under test (DUT). Each module includes a memory for storing instruction sets indicating how the module is to be configured for each test of the sequence. Before the start of each test, a microcontroller in each module executes an instruction set to appropriately configure the module for the test. The microcontroller in each module thereafter sends a ready signal to a start logic circuit in each other module indicating that it is ready to perform the test. When the microcontrollers of all modules taking part in the test have signaled they are ready, the start logic circuit in each module signals its microcontroller to begin the test. The modules then carry out the test with their activities synchronized to a master clock signal. The process of configuring the modules, generating the ready signals and commencing a test is repeated for each test of the sequence.