发明授权
- 专利标题： Method for depositing a thin film
- 专利标题（中）： 沉积薄膜的方法
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申请号： US924304申请日： 1997-09-05
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公开(公告)号： US6069094A公开(公告)日： 2000-05-30
- 发明人: Hideki Matsumura , Akira Izumi , Atsushi Masuda , Yasunobu Nashimoto , Yosuke Miyoshi , Shuji Nomura , Kazuo Sakurai , Shouichi Aoshima
- 申请人： Hideki Matsumura , Akira Izumi , Atsushi Masuda , Yasunobu Nashimoto , Yosuke Miyoshi , Shuji Nomura , Kazuo Sakurai , Shouichi Aoshima
- 申请人地址： JPX Kanazawa JPX Tokyo JPX Tokyo
- 专利权人： Hideki Matsumra,NEC Corporation,ANELVA Corporation
- 当前专利权人： Hideki Matsumra,NEC Corporation,ANELVA Corporation
- 当前专利权人地址： JPX Kanazawa JPX Tokyo JPX Tokyo
- 优先权： JPX8-257675 19960906
- 主分类号： H01L21/205
- IPC分类号： H01L21/205 ; C23C16/02 ; C23C16/44 ; H01L21/28 ; H01L21/31 ; H01L21/314 ; H01L21/316 ; H01L21/318
摘要：
This invention discloses a method and apparatus where a pre-treatment which reduce interfacial level density is carried out before thin film deposition on a substrate utilizing a catalytic gas phase reaction. The catalytic gas phase reaction is generated with a treatment gas which is supplied with the substrate via a thermal catalysis body provided near the substrate surface. Thin film deposition on the substrate surface is carried out after this pre-treatment. The thermal catalysis body is made of tungsten, molybdenum, tantalum, titanium or vanadium, and is heated by a heater. And, this invention also discloses a semiconductor device having a semiconductor-insulator junction with its interfacial level density is 10.sup.12 eV .sup.-1 cm.sup.-2 or less, which is brought by the above pre-treatment in the insulator film deposition process.
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