发明授权
US6075899A Image decoder and image memory overcoming various kinds of delaying
factors caused by hardware specifications specific to image memory by
improving storing system and reading-out system
失效
图像解码器和图像存储器通过改进存储系统和读出系统来克服由图像存储器特有的硬件规格引起的各种延迟因素
- 专利标题: Image decoder and image memory overcoming various kinds of delaying factors caused by hardware specifications specific to image memory by improving storing system and reading-out system
- 专利标题(中): 图像解码器和图像存储器通过改进存储系统和读出系统来克服由图像存储器特有的硬件规格引起的各种延迟因素
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申请号: US66308申请日: 1998-03-27
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公开(公告)号: US6075899A公开(公告)日: 2000-06-13
- 发明人: Kosuke Yoshioka , Makoto Hirai , Tokuzo Kiyohara , Kozo Kimura
- 申请人: Kosuke Yoshioka , Makoto Hirai , Tokuzo Kiyohara , Kozo Kimura
- 申请人地址: JPX Osaka
- 专利权人: Matsushita Electric Industrial Co., Ltd.
- 当前专利权人: Matsushita Electric Industrial Co., Ltd.
- 当前专利权人地址: JPX Osaka
- 优先权: JPX8-228850 19960829
- 主分类号: H04N5/907
- IPC分类号: H04N5/907 ; H04N9/64 ; H04N19/00 ; H04N19/423 ; H04N19/426 ; H04N19/44 ; H04N19/46 ; H04N19/503 ; H04N19/59 ; H04N19/61 ; H04N19/625 ; H04N19/70 ; H04N19/85 ; H04N19/91 ; G06K9/46
摘要:
An image memory stores a one-screen image by dividing the one-screen image into a plurality of image blocks which are each m pixels wide by n pixels high. The image memory has an array-like storage region storing s*t first chrominance components that compose one image block and s*t second chrominance components that compose the same image block in serial areas between a start area specified by a row address and a first column address and an end area specified by the same row address and a second column address (see FIG. 10). The storage region also stores m*n luminance components that compose the same image block in serial areas between a different start area specified by a different row address and a third column address and an end area are specified by the different row address and a fourth column address.
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