发明授权
US06335650B1 Method and apparatus for adjusting time delays in circuits with multiple operating supply voltages
有权
用于调整具有多个工作电源电压的电路中的时间延迟的方法和装置
- 专利标题: Method and apparatus for adjusting time delays in circuits with multiple operating supply voltages
- 专利标题(中): 用于调整具有多个工作电源电压的电路中的时间延迟的方法和装置
-
申请号: US09670829申请日: 2000-09-28
-
公开(公告)号: US06335650B1公开(公告)日: 2002-01-01
- 发明人: David William Boerstler , Harm Peter Hofstee , Hung Cai Ngo , Kevin John Nowka
- 申请人: David William Boerstler , Harm Peter Hofstee , Hung Cai Ngo , Kevin John Nowka
- 主分类号: H03H1126
- IPC分类号: H03H1126
摘要:
A method and apparatus for adjusting time delays in circuits with multiple operating supply voltages are disclosed. A voltage level detector and a delay means are coupled to a critical timing circuit of an integrated circuit capable of operating at multiple supply voltages. The voltage level detector detects a supply voltage at which the integrated circuit is operating. When the operating supply voltage of the integrated circuit changes from a first voltage level to a second voltage level, the voltage level detector sends a signal to the delay means and to a current enhancement circuit such that the delay means and current enhancement circuit can automatically modify the delay of the switching time of an output signal from the critical timing circuit.
信息查询