发明授权
- 专利标题： Ferroelectric and high dielectric constant transistors
- 专利标题（中）： 铁电和高介电常数晶体管
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申请号： US09686552申请日： 2000-10-11
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公开(公告)号： US06559469B1公开(公告)日： 2003-05-06
- 发明人: Carlos A. Paz de Araujo , Larry D. McMillan , Vikram Joshi , Narayan Solayappan , Joseph D. Cuchiaro
- 申请人： Carlos A. Paz de Araujo , Larry D. McMillan , Vikram Joshi , Narayan Solayappan , Joseph D. Cuchiaro
- 主分类号： H01L2972
- IPC分类号： H01L2972
摘要：
An integrated circuit includes a layered superlattice material having the formula A1w1+a1A2w2+a2 . . . Ajwj+ajS1x1+s1S2x2+s2 . . . Skxk+skB1y1+b1B2y2+b2 . . . Blyl+blQz−q, where A1, A2 . . . Aj represent A-site elements in a perovskite-like structure, S1, S2 . . . Sk represent superlattice generator elements, B1, B2 . . . B1 represent B-site elements in a perovskite-like structure, Q represents an anion, the superscripts indicate the valences of the respective elements, the subscripts indicate the number of atoms of the element in the unit cell, and at least w1 and y1 are non-zero. Some of these materials are extremely low fatigue ferroelectrics and are applied in ferroelectric FETs in non-volatile memories. Others are high dielectric constant materials that do not degrade or break down over long periods of use and are applied as the gate insulator in volatile memories.
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