发明授权
- 专利标题: Semiconductor device and method of manufacturing the same
- 专利标题(中): 半导体装置及其制造方法
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申请号: US10188103申请日: 2002-07-03
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公开(公告)号: US06882006B2公开(公告)日: 2005-04-19
- 发明人: Shigenobu Maeda , Yasuo Yamaguchi , Hirotada Kuriyama , Shigeto Maegawa
- 申请人: Shigenobu Maeda , Yasuo Yamaguchi , Hirotada Kuriyama , Shigeto Maegawa
- 申请人地址: JP Tokyo
- 专利权人: Renesas Technology Corp.
- 当前专利权人: Renesas Technology Corp.
- 当前专利权人地址: JP Tokyo
- 代理机构: McDermott Will & Emery LLP
- 优先权: JP5-135430 19930512; JP5-345126 19931220
- 主分类号: H01L21/768
- IPC分类号: H01L21/768 ; H01L21/8242 ; H01L27/092 ; H01L27/10 ; H01L27/108 ; H01L27/11 ; H01L27/12 ; H01L29/78 ; H01L29/76 ; H01L29/94 ; H01L31/062 ; H01L31/113 ; H01L31/119
摘要:
A field effect transistor occupying a small area and a semiconductor device using the same can be obtained. A gate electrode is provided on a substrate on which a source region is provided with a first interlayer insulating film interposed therebetween. The gate electrode is covered with a second interlayer insulating film. A contact hole for exposing a part of the surface of the source region is provided so as to penetrate through the first interlayer insulating film, the gate electrode, and the second interlayer insulating film. A sidewall surface of the contact hole is covered with a gate insulating film. A first semiconductor layer of a first conductivity type is provided on the surface of the source region in contact therewith up to the lower surface of the gate electrode. A channel semiconductor layer is provided on the surface of the first semiconductor layer up to the upper surface of the gate electrode. A second semiconductor layer of a first conductivity type serving as a drain region is provided on the channel semiconductor layer.
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