发明授权
- 专利标题: Method of forming sub-micron-size structures over a substrate
- 专利标题(中): 在基底上形成亚微米级结构的方法
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申请号: US10364281申请日: 2003-02-10
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公开(公告)号: US06887395B2公开(公告)日: 2005-05-03
- 发明人: Scott A. Hareland , Brian S. Doyle , Robert S. Chau
- 申请人: Scott A. Hareland , Brian S. Doyle , Robert S. Chau
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Blakely, Sokoloff, Taylor & Zafman LLP
- 主分类号: B44C1/22
- IPC分类号: B44C1/22 ; B81B1/00 ; B81C1/00 ; H01L21/00 ; H01L29/06 ; H01L29/12
摘要:
A method is provided for forming sub-micron-size structures over a substrate. A width-defining step is formed over the substrate. A width-defining layer is formed over an edge of the width-defining step. The width-defining layer is etched back to leave a spacer adjacent the width-defining step. A length-defining step is formed over the substrate. A length-defining layer is formed over an edge of the length-defining step. The length-defining layer is etched back to leave a spacer adjacent a first edge of the length-defining step and across a first portion of the spacer left by the width-defining layer. The length-defining step is then removed. The spacer left by the width-defining layer is then etched with the spacer left by the length-defining layer serving as a mask, to form the structure.
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