发明授权
- 专利标题: Method of fabricating an ultra-narrow channel semiconductor device
- 专利标题(中): 制造超窄通道半导体器件的方法
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申请号: US10629039申请日: 2003-07-28
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公开(公告)号: US06897098B2公开(公告)日: 2005-05-24
- 发明人: Scott A. Hareland , Robert Chau
- 申请人: Scott A. Hareland , Robert Chau
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Blakely, Sokoloff, Taylor & Zafman LLP
- 主分类号: H01L21/335
- IPC分类号: H01L21/335 ; H01L29/76 ; H01L29/775 ; H01L21/82
摘要:
A method of forming a nanowire is disclosed. A nanowire having a first dimension is deposited on a first dielectric layer that is formed on a substrate. A sacrificial gate stack having a sacrificial dielectric layer and a sacrificial gate electrode layer is deposited over a first region of the nanowire leaving exposed a second region and a third region of the nanowire. A first spacer is deposited on each side of the sacrificial gate stack. A second dielectric layer is deposited over the first dielectric layer to cover the second region and third region. The sacrificial gate stack is removed. The first region of the nanowire is thinned by at least one thermal oxidation process and oxide removal process to thin said first region from said first dimension to a second dimension.
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