发明授权
- 专利标题: Inhibition of tin oxide formation in lead free interconnect formation
- 专利标题(中): 在无铅互连形成中抑制氧化锡形成
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申请号: US10604560申请日: 2003-07-30
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公开(公告)号: US06900142B2公开(公告)日: 2005-05-31
- 发明人: Emanual I. Cooper , John M. Cotte , Lisa A. Fanti , David E. Eichstadt , Stephen J. Kilpatrick , Henry A. Nye, III , Donna S. Zupanski-Nielsen
- 申请人: Emanual I. Cooper , John M. Cotte , Lisa A. Fanti , David E. Eichstadt , Stephen J. Kilpatrick , Henry A. Nye, III , Donna S. Zupanski-Nielsen
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: DeLio & Peterson, LLC
- 代理商 John J. Tomaszewski; James J. Cioffi
- 主分类号: H01L21/302
- IPC分类号: H01L21/302 ; H01L21/44 ; H01L21/461 ; H01L21/60
摘要:
A method is provided for removing exposed seed layers in the fabrication of solder interconnects on electronic components such as semiconductor wafers without damaging the interconnects or underlying wafer substrate and with a high wafer yield. The solder interconnects are lead free or substantially lead free and typically contain Sn. An oxalic acid solution is used to contact the wafer after an etching step to remove part of the seed layer. The seed layer is typically a Cu containing layer with a lower barrier layer containing barrier metals such as Ti, Ta and W. The lower barrier layer remains after the etch and the oxalic acid solution inhibits the formation of Sn compounds on the barrier layer surface which compounds may mask the barrier layer and the barrier layer etchant resulting in incomplete barrier layer removal on the wafer surface. Any residual conductive barrier layer can cause shorts and other wafer problems and result in a lower wafer yield. An electroetch is preferred to remove the portion of the seed layer overlying the lower barrier layer.
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