Invention Grant
- Patent Title: Method for forming a semiconductor device structure a semiconductor layer
- Patent Title (中): 半导体器件形成半导体层结构的方法
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Application No.: US10677070Application Date: 2003-10-01
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Publication No.: US06949455B2Publication Date: 2005-09-27
- Inventor: Daniel Thanh-Khac Pham , Bich-Yen Nguyen , James K. Schaeffer , Melissa O. Zavala , Sherry G. Straub , Kimberly G. Reid , Marc Rossow , James P. Geren
- Applicant: Daniel Thanh-Khac Pham , Bich-Yen Nguyen , James K. Schaeffer , Melissa O. Zavala , Sherry G. Straub , Kimberly G. Reid , Marc Rossow , James P. Geren
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent James L. Clingan, Jr.; Robert L. King
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L21/8238 ; H01L29/49 ; H01L29/51 ; H01L21/3205
Abstract:
A method for providing gates of transistors with at least two different work functions utilizes a silicidation of two different metals at different times, silicidation for one gate and polysilicon for the other, or silicidation using a single metal with two differently doped silicon structures. Thus the problem associated with performing silicidation of two different metals at the same time is avoided. If the two metals have significantly different silicidation temperatures, the one with the lower temperature silicidation will likely have significantly degraded performance as a result of having to also experience the higher temperature required to achieve silicidation with the other metal.
Public/Granted literature
- US20040063285A1 Method for forming a semiconductor device structure a semiconductor layer Public/Granted day:2004-04-01
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