发明授权
US07132718B2 Fabrication method and structure of semiconductor non-volatile memory device
有权
半导体非易失性存储器件的制造方法和结构
- 专利标题: Fabrication method and structure of semiconductor non-volatile memory device
- 专利标题(中): 半导体非易失性存储器件的制造方法和结构
-
申请号: US10726507申请日: 2003-12-04
-
公开(公告)号: US07132718B2公开(公告)日: 2006-11-07
- 发明人: Digh Hisamoto , Shinichiro Kimura , Kan Yasui , Nozomu Matsuzaki
- 申请人: Digh Hisamoto , Shinichiro Kimura , Kan Yasui , Nozomu Matsuzaki
- 申请人地址: JP Tokyo
- 专利权人: Renesas Technology Corp.
- 当前专利权人: Renesas Technology Corp.
- 当前专利权人地址: JP Tokyo
- 代理机构: Antonelli, Terry, Stout and Kraus, LLP.
- 优先权: JPP2002-352040 20021204
- 主分类号: H01L29/76
- IPC分类号: H01L29/76 ; H01L29/94 ; H01L31/062 ; H01L31/113 ; H01L31/119
摘要:
A non-volatile semiconductor memory device with good write/erase characteristics is provided. A selection gate is formed on a p-type well of a semiconductor substrate via a gate insulator, and a memory gate is formed on the p-type well via a laminated film composed of a silicon oxide film, a silicon nitride film, and a silicon oxide film. The memory gate is adjacent to the selection gate via the laminated film. In the regions on the both sides of the selection gate and the memory gate in the p-type well, n-type impurity diffusion layers serving as the source and drain are formed. The region controlled by the selection gate and the region controlled by the memory gate located in the channel region between said impurity diffusion layers have the different charge densities of the impurity from each other.
公开/授权文献
信息查询
IPC分类: