发明授权
- 专利标题： Vertical DRAM and fabrication method thereof
- 专利标题（中）： 垂直DRAM及其制造方法
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申请号： US10707396申请日： 2003-12-10
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公开(公告)号： US07135731B2公开(公告)日： 2006-11-14
- 发明人: Ching-Nan Hsiao , Ying-Cheng Chuang , Chi-Hui Lin
- 申请人： Ching-Nan Hsiao , Ying-Cheng Chuang , Chi-Hui Lin
- 申请人地址： TW Tao-Yuan Hsien
- 专利权人： Nanya Technology Corp.
- 当前专利权人： Nanya Technology Corp.
- 当前专利权人地址： TW Tao-Yuan Hsien
- 代理商 Winston Hsu
- 主分类号： H01L27/108
- IPC分类号： H01L27/108 ; H01L29/76 ; H01L29/94 ; H01L31/119
摘要：
A vertical DRAM and fabrication method thereof. The vertical DRAM has a plurality of memory cells on a substrate, and each of the memory cells has a trench capacitor, a vertical transistor, and a source-isolation oxide layer in a deep trench. The main advantage of the present invention is to form an annular source diffusion and an annular drain diffusion of the vertical transistor around the sidewall of the deep trench. As a result, when a gate of the transistor is turned on, an annular gate channel is provided. The width of the gate channel of the present invention is therefore increased.
公开/授权文献
- US20050127422A1 VERTICAL DRAM AND FABRICATION METHOD THEREOF 公开/授权日：2005-06-16
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