Invention Grant
US07187000B2 High performance tunneling-biased MOSFET and a process for its manufacture
有权
高性能隧道偏置MOSFET及其制造工艺
- Patent Title: High performance tunneling-biased MOSFET and a process for its manufacture
- Patent Title (中): 高性能隧道偏置MOSFET及其制造工艺
-
Application No.: US11081993Application Date: 2005-03-16
-
Publication No.: US07187000B2Publication Date: 2007-03-06
- Inventor: Kuo-Nan Yang , Yi-Ling Chang , You-Lin Chu , Hou-Yu Chen , Fu-Liang Yang , Chenming Hu
- Applicant: Kuo-Nan Yang , Yi-Ling Chang , You-Lin Chu , Hou-Yu Chen , Fu-Liang Yang , Chenming Hu
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Inc.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Inc.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L23/62
- IPC: H01L23/62 ; H01L29/10

Abstract:
A semiconductor structure and a method for its manufacture are provided. In one example, the structure includes a well region doped with a first type dopant (e.g., a P-type or N-type dopant). A gate pedestal formed over the well region has two ends, one of which at least partially overlies the well region and is doped with the first type dopant. A dielectric layer is positioned between the gate pedestal and the well region. Source and drain regions formed on opposite sides of the gate pedestal within the well region are doped with a second type dopant opposite in type to the first type dopant.
Public/Granted literature
- US20060208316A1 High performance tunneling-biased MOSFET and a process for its manufacture Public/Granted day:2006-09-21
Information query
IPC分类: