发明授权
US07256089B2 Top electrode barrier for on-chip die de-coupling capacitor and method of making same
有权
用于片上芯片去耦电容器的顶部电极屏障及其制造方法
- 专利标题: Top electrode barrier for on-chip die de-coupling capacitor and method of making same
- 专利标题(中): 用于片上芯片去耦电容器的顶部电极屏障及其制造方法
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申请号: US09962786申请日: 2001-09-24
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公开(公告)号: US07256089B2公开(公告)日: 2007-08-14
- 发明人: Richard Scott List , Bruce A. Block , Ruitao Zhang
- 申请人: Richard Scott List , Bruce A. Block , Ruitao Zhang
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Blakely, Sokoloff, Taylor & Zafman LLP
- 主分类号: H01L21/8242
- IPC分类号: H01L21/8242 ; H01L21/20
摘要:
An improvement in the method of fabricating on chip decoupling capacitors which help prevent L di/dt voltage droop on the power grid for high surge current conditions is disclosed. The inclusion of a hybrid metal/metal nitride top electrode/barrier provides for a low cost and higher performance option to strapping decoupling capacitors.
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