发明授权
US07523327B2 System and method of coherent data transfer during processor idle states
有权
处理器空闲状态期间相干数据传输的系统和方法
- 专利标题： System and method of coherent data transfer during processor idle states
- 专利标题（中）： 处理器空闲状态期间相干数据传输的系统和方法
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申请号： US11074233申请日： 2005-03-05
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公开(公告)号： US07523327B2公开(公告)日： 2009-04-21
- 发明人: Leslie E. Cline , Siripong Sritanyaratana , Alon Naveh , Shai Rotem , Eric C. Samson , Michael N. Derr
- 申请人： Leslie E. Cline , Siripong Sritanyaratana , Alon Naveh , Shai Rotem , Eric C. Samson , Michael N. Derr
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Blakely, Sokoloff, Taylor & Zafman LLP
- 主分类号： G06F1/32
- IPC分类号： G06F1/32
摘要：
Systems and methods of managing power provide for placing a processor in a non-snoopable state, where the processor is associated with a system memory. One or more data transfers between a controller and the system memory can be serviced while the processor is in the non-snoopable state. In one embodiment, it is determined that the processor has flushed an internal cache of the processor to the system memory before placing the processor in the non-snoopable state.
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