发明授权
US07814649B2 Method of making circuitized substrate with filled isolation border
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制造具有填充隔离边界的电路化基板的方法
- 专利标题： Method of making circuitized substrate with filled isolation border
- 专利标题（中）： 制造具有填充隔离边界的电路化基板的方法
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申请号： US11482945申请日： 2006-07-10
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公开(公告)号： US07814649B2公开(公告)日： 2010-10-19
- 发明人: John M. Lauffer , James M. Larnerd , Voya R. Markovich
- 申请人： John M. Lauffer , James M. Larnerd , Voya R. Markovich
- 申请人地址： US NY Endicott
- 专利权人： Endicott Interconnect Technologies, Inc.
- 当前专利权人： Endicott Interconnect Technologies, Inc.
- 当前专利权人地址： US NY Endicott
- 代理机构： Hinman, Howard & Kattell
- 代理商 Mark Levy; Lawrence R. Fraley
- 主分类号： H05K3/02
- IPC分类号： H05K3/02 ; H05K3/10
摘要：
A method of making a circuitized substrate which includes a plurality of contiguous open segments along a side edge portion of the at least one electrically conductive layer thereof, these open segments isolated by a barrier of dielectric material which substantially fills the open segments, e.g., during a lamination process which bonds two dielectric layers of the substrate to the conductive layer.
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