Invention Grant
US07906383B2 Stress transfer in an interlayer dielectric by providing a stressed dielectric layer above a stress-neutral dielectric material in a semiconductor device
有权
通过在半导体器件中的应力 - 中性电介质材料上方提供应力介电层，在层间电介质中进行应力转移
- Patent Title: Stress transfer in an interlayer dielectric by providing a stressed dielectric layer above a stress-neutral dielectric material in a semiconductor device
- Patent Title (中): 通过在半导体器件中的应力 - 中性电介质材料上方提供应力介电层，在层间电介质中进行应力转移
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Application No.: US12045095Application Date: 2008-03-10
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Publication No.: US07906383B2Publication Date: 2011-03-15
- Inventor: Ralf Richter , Andy Wei , Manfred Horstmann , Joerg Hohage
- Applicant: Ralf Richter , Andy Wei , Manfred Horstmann , Joerg Hohage
- Applicant Address: US TX Austin
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US TX Austin
- Agency: Williams, Morgan & Amerson, P.C.
- Priority: DE102007041210 20070831
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L21/311 ; H01L21/70 ; H01L27/085
Abstract:
By forming a stressed dielectric layer on different transistors and subsequently relaxing a portion thereof, the overall process efficiency in an approach for creating strain in channel regions of transistors by stressed overlayers may be enhanced while nevertheless transistor performance gain may be obtained for each type of transistor, since a highly stressed material positioned above the previously relaxed portion may also efficiently affect the underlying transistor.
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