发明授权
- 专利标题: Modified via bottom structure for reliability enhancement
- 专利标题(中): 通过底部结构改进可靠性增强
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申请号: US12121216申请日: 2008-05-15
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公开(公告)号: US07906428B2公开(公告)日: 2011-03-15
- 发明人: Lawrence A. Clevenger , Timothy Joseph Dalton , Louis C. Hsu , Conal Eugene Murray , Carl Radens , Kwong-Hon Wong , Chih-Chao Yang
- 申请人: Lawrence A. Clevenger , Timothy Joseph Dalton , Louis C. Hsu , Conal Eugene Murray , Carl Radens , Kwong-Hon Wong , Chih-Chao Yang
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Scully, Scott, Murphy & Presser, P.C.
- 代理商 Louis J. Percello, Esq.
- 主分类号: H01L21/4763
- IPC分类号: H01L21/4763
摘要:
The present invention provides an interconnect structure that can be made in the BEOL which exhibits good mechanical contact during normal chip operations and does not fail during various reliability tests as compared with the conventional interconnect structures described above. The inventive interconnect structure has a kinked interface at the bottom of a via that is located within an interlayer dielectric layer. Specifically, the inventive interconnect structure includes a first dielectric layer having at least one metallic interconnect embedded within a surface thereof; a second dielectric layer located atop the first dielectric layer, wherein said second dielectric layer has at least one aperture having an upper line region and a lower via region, wherein the lower via region includes a kinked interface; at least one pair of liners located on at least vertical walls of the at least one aperture; and a conductive material filling the at least one aperture.
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