发明授权
US07928505B2 Semiconductor device with vertical trench and lightly doped region
失效
具有垂直沟槽和轻掺杂区域的半导体器件
- 专利标题： Semiconductor device with vertical trench and lightly doped region
- 专利标题（中）： 具有垂直沟槽和轻掺杂区域的半导体器件
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申请号： US12326392申请日： 2008-12-02
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公开(公告)号： US07928505B2公开(公告)日： 2011-04-19
- 发明人: Takashi Hirao , Takayuki Hashimoto , Noboru Akiyama
- 申请人： Takashi Hirao , Takayuki Hashimoto , Noboru Akiyama
- 申请人地址： JP Kanagawa
- 专利权人： Renesas Electronics Corporation
- 当前专利权人： Renesas Electronics Corporation
- 当前专利权人地址： JP Kanagawa
- 代理机构： Mattingly & Malur, P.C.
- 优先权： JP2007-312001 20071203
- 主分类号： H01L29/76
- IPC分类号： H01L29/76 ; H01L29/94 ; H01L31/062 ; H01L31/113 ; H01L31/119
摘要：
The vertical trench MOSFET comprises: an N type epitaxial region formed on an upper surface of an N+ type substrate having a drain electrode on a lower surface thereof; a gate trench extending from a front surface into the N type epitaxial region; a gate electrode positioned in the gate trench so as to interpose an insulator; a channel region formed on the N type epitaxial region; a source region formed on the channel region; a source electrode formed on the source region; a source trench extending from the front surface into the N type epitaxial region; and a trench-buried source electrode positioned in the source trench so as to interpose an insulator, wherein the source electrode contacts with the trench-buried source electrode.