发明授权
- 专利标题： Processor power consumption control and voltage drop via micro-architectural bandwidth throttling
- 专利标题（中）： 处理器功耗控制和电压降通过微架构带宽调节
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申请号： US12284303申请日： 2008-09-19
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公开(公告)号： US08028181B2公开(公告)日： 2011-09-27
- 发明人: Sanjeev Jahagirdar , Edward Gamsaragan , Scott E. Siers
- 申请人： Sanjeev Jahagirdar , Edward Gamsaragan , Scott E. Siers
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理商 Derek J. Reynolds
- 主分类号： G06F1/00
- IPC分类号： G06F1/00
摘要：
A method, device, and system are disclosed. In one embodiment the method includes supplying a processor with a first voltage. The method also includes allowing the processor to function within an enhanced processor halt state at the first voltage. The first voltage is a voltage below the lowest compatible voltage for the enhanced processor halt state. The method allows the processor to execute instructions upon waking from the enhanced processor halt state at the first voltage by throttling a maximum throughput rate of instructions being executed in the processor.
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